1. Field of the Invention
The present invention relates to an apparatus and method for driving a plasma display panel, and more particularly, to a scan drive apparatus and method for a plasma display panel.
2. Description of the Background Art
Generally, a plasma display panel (hereinafter abbreviated PDP) displays an image including characters and graphics by exciting a fluorescent substance using a 147 nm UV-ray emitted as a result of a mixed gas discharge involving (He+Xe) or (Ne+Xe).
FIG. 1 is a perspective diagram of a PDP according to the related art. Referring to FIG. 1, the PDP consists of a Y-electrode 12A and a Z-electrode 12B formed on an upper substrate 10 and an X-electrode 20 formed on a lower substrate 18.
Each of the Y- and X-electrodes 12A and 12B includes a transparent electrode and a bus electrode. The transparent electrode is generally made of indium tin oxide (ITO), whereas the bus electrode is made of metal to reduce resistance thereof.
The PDP includes an upper dielectric layer 14 and a protecting layer 16. The upper dielectric layer 14 and the protecting layer 16 are sequentially stacked on the upper substrate 10 including the Y- and Z-electrodes 12A and 12B.
Wall charges generated as a result of plasma discharge accumulate on the upper dielectric layer 14. The protecting layer 16 protects the upper dielectric layer 14 against sputtering caused by plasma discharge and increases the discharge efficiency of secondary electrons. The protecting layer 16 is generally made of MgO.
The PDP also includes a lower dielectric layer 22 and a barrier rib 24. The lower dielectric layer 22 and the barrier rib 24 are formed on the lower substrate 18, where the X-electrode 20 is formed thereon. A fluorescent layer 26 is formed on the surfaces of the lower dielectric layer 22 and the barrier rib 24.
The X-electrode 20 runs in a direction such that it crosses the Y- and Z-electrodes 12A and 12B. The barrier rib 24 is formed parallel to the X-electrode 20 to prevent UV and visible rays, which are generated as a result of electric discharge, from leaking into neighboring discharge cells.
The fluorescent layer 26 is excited by the UV-rays. The fluorescent layer 26, in turn, emits light including one of red, green, and blue visible light rays. A mixed inert gas such as He+Xe, Ne+Xe, He+Ne+Xe, and the like for purposes of electric discharge, is injected into a discharge space of the discharge cell between the barrier ribs 24 and the upper and lower substrates 10 and 18.
FIG. 2 is a circuit diagram of a drive device in a PDP according to the related art. Referring to FIG. 2, if a channel corresponding to a first Y-electrode Y1 is selected during a scan process, other channels corresponding to the remaining Y-electrodes Y2 to Yn are not selected. Thus, once a channel is selected, for example, scan electrode Y1, a second switching device 213-1 of a first scan driver 210-1 is turned on and a scan switching device 220 is turned on. It will be understood that “on” refers to a switching state where the corresponding switch is closed (i.e., conducting), whereas “OFF” refers to a switching state where the corresponding switch is open (i.e., not conducting). Simultaneously, first switching devices 211-2 to 211-n of scan drivers 210-2 to 210-n corresponding to the unselected channels and a ground switching device 230 are turned on.
If the first Y-electrode Y1 is selected and a data voltage +Vd is applied to one or more of the X-electrodes X1 to Xm by operation of one or more of the first data switching devices 310-1 to 310-m in data driver IC 300-1 to 300-m, a write operation is performed on the corresponding cells situated along the first Y-electrode Y1. A data voltage 0V is applied by operation of one or more of the second data switching devices 320-1 to 320-n, to each of the remaining X-electrodes for which no write operation will be performed on the corresponding cells along the first Y-electrode Y1.
Once the above-process is performed for each of the Y-electrodes Y1 to Yn, the scan process is complete. After the scan process, a first sustain switch device 240, second switching devices 213-1 to 213-n of scan drivers 210-1 to 210-n and a ground switching device 260 are turned on. Accordingly, a first sustain voltage (+Vsy), the first sustain switching device 240, the second switching devices 213-1 to 213-n of the scan drivers 210-1 to 210-n, the Y-electrodes Y1 to Yn, Z-electrodes Z1 to Zn, and the ground switching device 260 establish a circuit loop such that the first sustain voltage (+Vsy) is applied to all the Y-electrodes Y1 to Yn.
Subsequently, a second sustain switching device 250, the first switching devices 211-1 to 211-n of the scan drivers 210-1 to 210-n, and the ground switching device 230 are turned on. Accordingly, a second sustain voltage (+Vsz), the Z-electrodes Z1 to Zn, the Y-electrodes Y1 to Yn, the first switching devices 211-1 to 211-n of the scan drivers 210-1 to 210-n, and the ground switching device 230 establish a circuit loop such that the second sustain voltage (+Vsz) is applied to the Z-electrodes Z1 to Zn.
The drive device of the PDP applies a scan voltage (−Vyscan) and the data voltage (+Vd or 0V) to the corresponding electrodes by the switching operations of the switching devices included in the scan drivers 210-1 to 210-n and the data driver IC 300-1 to 300-m during a scan period. During this process, a displacement current Id flows in the data driver IC 300-1 to 300-m via the X-electrodes.
As a typical PDP has a 3-electrode configuration, a first equivalent capacitor Cm1 is situated between X-electrodes and a second equivalent capacitor Cm2 is situated between the X- and Y-electrodes and/or between the X- and Z-electrodes, which is shown in FIG. 2.
Since the state of the voltage applied to the electrodes changes according to the operation of the switching devices included in the scan drivers 210-1 to 210-n and the data driver ICs 300-1 to 300-m, the displacement current generated by the first and second equivalent capacitors Cm1 and Cm2 flows into the data driver IC 300-1 to 300-m via the X-electrodes.
Yet, the displacement current Id flowing into the data driver IC 300-1 to 300-m and the corresponding power vary depending on the video data applied to the X-electrodes X1 to Xm.
FIGS. 3A to 3E are diagrams illustrating displacement current and corresponding power according to video data. Referring to FIG. 2 and FIG. 3A, when the second Y-electrode Y2 is scanned, video data having alternating logic values 1 and 0 are applied to the X-electrodes X1 to Xm. When the third Y-electrode Y3 is scanned, a logic value 0 is sustained at the X-electrodes X1 to Xm. The logic value 1 means that the data voltage +Vd is applied to the corresponding X-electrode, and the logic value 0 means that 0V is applied to the corresponding X-electrode.
More generally, video data having alternating logic values 1 and 0 is applied to a given cell on a Y-electrode (e.g., the second Y-electrode Y2), while video data having the logic value 0 is applied to an adjacent cell on the next Y-electrode (e.g., Y-electrode Y3). In doing so, the displacement current Id flowing into each of the X-electrodes and the corresponding power Pd follow Formula 1.Id=½(Cm1+Cm2)−1*VA  [Formula 1]Pd=½(Cm1+Cm2)−1*VA2 
Id: displacement current flowing in each X-electrode
Cm1: 1st equivalent capacitor
Cm2: 2nd equivalent capacitor
Va: voltage applied to each X-electrode (+Vd or 0V)
Pd: power consumption due to displacement current Id
Referring to FIG. 2 and FIG. 3B, when the second Y-electrode Y2 is scanned, video data sustaining the logic value 1 is applied to the X-electrodes X1 to Xm. When the third Y-electrode Y3 is scanned, a logic value 0 is sustained at the X-electrodes X1 to Xm. The logic value 0 means that 0V are applied to the corresponding X-electrode.
More generally, video data having the logic value 1 is applied to a given cell on a Y-electrode (e.g., the second Y-electrode Y2), while video data having the logic value 0 is applied to an adjacent cell on the next Y-electrode (e.g., the third Y-electrode Y3). Alternatively, video data having the logic value 0 is applied to a give cell on a Y-electrode (e.g., the second Y-electrode Y2), while video data having the logic value 1 is applied to an adjacent cell on a next Y-electrode (e.g., the third Y-electrode Y3). In doing so, the displacement current Id flowing into each of the X-electrodes and the corresponding power follow Formula 2.Id=½(Cm2)−1*VA  [Formula 2]Pd=½(Cm2)−1*VA2 
Id: displacement current flowing in each X-electrode.
Cm2: 2nd equivalent capacitor
Va: voltage (0V) applied to each X-electrode (+Vd or 0V)
Pd: power consumption due to displacement current Id
Referring to FIG. 2 and FIG. 3C, when the second Y-electrode Y2 is scanned, video data having alternating logic values 1 and 0 is applied to the X-electrodes X1 to Xm. When the third Y-electrode Y3 is scanned, video data having alternating logic values 1 and 0, which is 180° out of phase with the video data applied to the cell on the second Y-electrode Y2, is applied. The logic value 1 means that the data voltage (+Vd) is applied to the corresponding X-electrode, and the logic value 0 means that 0V is applied to the corresponding X-electrode.
More generally, video data having the alternating logic values 1 and 0 is applied to a given cell on an Y-electrode (e.g., Y2), while video data having alternating logic values 1 and 0, which is 180° out of phase with the video data applied to the cell on the aforementioned electrode, is applied to an adjacent cell on the next Y-electrode (i.e., Y3). In doing so, the displacement current Id flowing into each of the X-electrodes and the corresponding power follow Formula 3.Id=½(4Cm1+Cm2)−1*VA  [Formula 3]Pd=½(4Cm1+Cm2)−1*VA2 
Id: displacement current flowing in each X-electrode
Cm1: 1st equivalent capacitor
Cm2: 2nd equivalent capacitor
Va: voltage applied to each X-electrode (+Vd or 0V)
Pd: power consumption due to displacement current Id
Referring to FIG. 2 and FIG. 3D, when the second Y-electrode Y2 is scanned, video data having alternating logic values 1 and 0 is applied to the X-electrodes X1 to Xm. When the third Y-electrode Y3 is scanned, video data having alternating logic values, which has the same phase as (i.e., in phase with) the video data applied to the cell on the second Y-electrode Y2, is applied. The logic value 1 means that the data voltage (+Vd) is applied to the corresponding X-electrode, and the logic value 0 means that 0V is applied to the corresponding X-electrode.
More generally, video data having the alternating logic values 1 and 0 is applied to a given cell on one Y-electrode (e.g., Y2), while video data having alternating logic values 1 and 0, which has the same phase as the video data applied to the cell on the aforementioned electrode is applied to an adjacent cell on the next Y-electrode (e.g., Y3). In doing so, the displacement current Id flowing into each of the X-electrodes and the corresponding power follow Formula 4.Id=0  [Formula 4]Pd=0
Id: displacement current flowing in each X-electrode
Pd: power consumption due to displacement current Id
Referring to FIG. 2 and FIG. 3E, when the second Y-electrode Y2 is scanned, video data sustaining a logic value 0 is applied to the X-electrodes X1 to Xm. When the third Y-electrode Y3 is scanned, video data sustaining a logic value 0 is applied to the third Y-electrode Y3. The logic value 0 means that 0V are applied to the corresponding X-electrode. More generally, video data sustaining the logic value 0 is applied to a given cell on one Y-electrode (e.g., Y2), while video data sustaining the logic value 0 is applied to an adjacent cell on the next Y-electrode (e.g., Y3). Alternatively, video data sustaining the logic value 1 is applied to a given cell on one Y-electrode (e.g., Y2), while video data sustaining the logic value 1 is applied to an adjacent cell on a next Y-electrode (e.g., Y3). In doing so, the displacement current Id flowing in each of the X-electrodes and the corresponding power follow Formula 5.Id=0  [Formula 5]Pd=0
Id: displacement current flowing in each X-electrode
Pd: power consumption due to displacement current Id
As shown by Formula 1 through Formula 5, the greatest amount of displacement current Id flowing into the X-electrodes occurs when video data having alternating logic values 1 and 0 is applied to the cell on a first Y-electrode and video data having alternating logic values 1 and 0, which is 180° out of phase with the video data applied to the cell on the first Y-electrode, is applied to an adjacent cell on a next Y-electrode.
In contrast, the least amount of displacement current Id flowing into the X-electrodes occurs when video data having alternating logic values 1 and 0 is applied to the cell on a first Y-electrode and video data having alternating logic values 1 and 0, which has the same phase as the video data applied to the cell on the first Y-electrode, is applied to the next Y-electrode. A least amount of displacement current Id also occurs when video data sustaining the logic value 0 is applied to both the cell on the first Y-electrode and the cell on the next Y-electrode.
Thus, the image displayed on the PDP according to the video data shown in FIGS. 3A to 3E corresponds to one of FIGS. 4A through 4D. Accordingly, the grid type image shown in FIG. 4C corresponds with the greatest amount of displacement current Id. Again, if the same video data is applied to the X-electrode, the smallest amount of displacement current occurs.
With respect to the data driver IC associated with one X-electrode, the video data in FIG. 3C and FIG. to the case where the number of switching operations of the data driver IC (i.e., the switching count) is the highest. Hence, the higher the switching count, the greater the displacement current Id flowing into the data driver IC.
Conversely, the video data in FIG. 3D, 3E and FIG. 4D correspond to the case where the switching count of the data driver IC is the smallest. Hence, the lower the switching count, the smaller the displacement current Id flowing into the data driver IC.
Again, maximum displacement current flows into the X-electrode when the PDP displays the grid type image thereon, as shown in FIG. 4C. However, the maximum displacement current Id can cause damage to the data driver ICs 300-1 to 300-m. The grid type image is used in half-toning to improve the image quality of the PDP, but in doing so, it brings about more serious problems.
FIG. 5A and FIG. 5B are diagrams for explaining dithering which is used to improve image quality in a conventional PDP. FIG. 5A illustrates a number of 4×4 dithering masks used for producing a ⅛ gray level through a ⅞ gray level. The use of a dithering process is for image quality enhancement in a PDP. These masks include a 4/8 gray level mask which exhibits the grid type pattern corresponding to FIG. 3C and FIG. 4C. Hence, the dither mask used in the dithering process induces a maximum displacement current Id.
In case of representing a gray level 27.5 using a dither mask, it is necessary to use subfields SF1, SF2, SF6, SF7, SF8, SF9, and SF10 for representing a gray level 27, and subfields SF1, SF3, SF9, and SF11 for representing a gray level 28, as shown in FIG. 5B, among subfields SF1 through SF13 to which corresponding weights are allocated, respectively. Thus, subfields SF2, SF6, SF7, SF8, and SF10 are selected in representing gray level 27, but not selected in representing gray level 28. On the other hand, subfields SF3 and SF11 are not selected in representing gray level 27, but are selected in representing gray level 28. As one can see, transitioning from gray level 27 to gray level 28 involves changing subfields takes place seven times. Changing subfield abruptly increments the switching count of the data driver IC. This, together with the grid type dither mask corresponding to the 4/8 gray level, causes a considerably high amount of displacement current Id to flow into the data driver IC. The considerably high amount of displacement current Id may cause the data drive IC to fail or to abnormally operate.